This invention pertains generally to computer and memory systems and more particularly to a self-configurable computer and memory system formed on a single wafer.
Computer systems are commonly created by interconnecting smaller modules such as CPU's, memory modules, and input/output controllers. These modules are often interconnected by a common bus which carries the full word data and memory address data in parallel.
In recent years, large scale integration (LSI) has been developed to the point where the modules can be integrated on a single chip, e.g., microprocessor CPU's. Thus, using LSI modules and a common bus for interconnection, a complete computer system can be constructed on a wafer. However, a potential problem exists because a bad LSI module can cause the entire wafer computer system to malfunction. Thus, redundant modules must be present on the wafer, and means for testing and avoiding bad modules must be provided.
Prior art techniques such as discretionary wiring, pad relocation, probe testing and computer mask generation might be used. However, these techniques have the disadvantage of high cost and inflexibility when other circuits fail in use.